Ultra-efficient design of robust RS flip-flop in nanoscale with energy dissipation study
Author:
Affiliation:
1. Institute of Information Technology (IIT), University of Dhaka, Dhaka, Bangladesh
2. Department of Information & Communication Technology, Mawlana Bhashani Science & Technology University, Tangail, Bangladesh
Publisher
Informa UK Limited
Subject
General Engineering,General Chemical Engineering,General Computer Science
Link
https://www.cogentoa.com/article/10.1080/23311916.2017.1391060.pdf
Reference40 articles.
1. International Journal of Hybrid Information Technology
2. Synthesis of Peres and R Logic Circuits in Nanoscopic Scale
3. International Journal of Grid and Distributed Computing
4. International Journal of Multimedia and Ubiquitous Engineering
5. Optimized design and performance analysis of novel comparator and full adder in nanoscale
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