Optimized design and performance analysis of novel comparator and full adder in nanoscale
Author:
Affiliation:
1. Institute of Information Technology (IIT), University of Dhaka , Dhaka, Bangladesh
2. Department of Information & Communication Technology, Mawlana Bhashani Science & Technology University , Tangail, Bangladesh
Publisher
Informa UK Limited
Subject
General Engineering,General Chemical Engineering,General Computer Science
Link
https://www.cogentoa.com/article/10.1080/23311916.2016.1237864.pdf
Reference49 articles.
1. Synthesis of Peres and R Logic Circuits in Nanoscopic Scale
2. QCA: An effective approach to implement logic circuit in nanoscale
3. International Journal of Multimedia and Ubiquitous Engineering
4. A Review on Reversible Logic Gates and its QCA Implementation
5. Coplanar Full Adder in Quantum-Dot Cellular Automata via Clock-Zone-Based Crossover
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