From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology

Author:

Basu Joydeep1ORCID

Affiliation:

1. Department of Electronics & Electrical Communication Engineering (E&ECE) and Advanced VLSI Design Laboratory (AVDL), Indian Institute of Technology Kharagpur, Kharagpur 721302, WB, India

Publisher

Informa UK Limited

Subject

General Earth and Planetary Sciences,General Engineering,General Environmental Science

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. High-Speed Multiplexed Feedback D Flip-Flop;Proceedings of Second International Conference on Computational Electronics for Wireless Communications;2023

3. Design of a low-noise low-voltage amplifier for improved neural signal recording;Review of Scientific Instruments;2022-06-01

4. Delta-sigma modulator based compact sensor signal acquisition front-end system;Microelectronics Journal;2020-04

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