Design of a low-noise low-voltage amplifier for improved neural signal recording

Author:

Sharma Kulbhushan1ORCID,Tripathi Rahul Kumar2,Jatana H. S.2,Sharma Rajnish1ORCID

Affiliation:

1. VLSI Centre of Excellence, Chitkara University Institute of Engineering and Technology, Chitkara University, Punjab, India

2. Semi-conductor Laboratory (SCL), Mohali, Punjab, India

Abstract

Design of amplifier circuits with low-noise operable at low-power to be used, especially for implantable neural interfaces, remains a huge challenge. This research paper presents the design of a low-noise low-voltage neural recording amplifier suitable for amplifying local field potentials and extracellular action potentials so as to meet the end requirement of an implantable neuro-medical system. Critical performance parameters of the smaller circuit blocks of the complete neural amplifier architecture have been found with the help of detailed mathematical analysis and then verified by the simulations conducted using 0.18 µm 4M1P foundry Semi-conductor Laboratory N-well process. The neural amplifier design proposed in this paper passes neural signal of interest with a mid-band gain of 49.9 dB over a bandwidth of 5.3 Hz–8.6 kHz, draws only 11.5 µW of power from ±0.9 V supply voltage, and exhibits an input-referred noise of 2.6 µVrms with a noise efficiency factor of 2.27. The area consumed by the proposed neural amplifier architecture is 0.192 mm2. The complete circuit design carried out in this paper should prove to be useful in equipment for the diagnosis of neurological disorders.

Publisher

AIP Publishing

Subject

Instrumentation

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