Novel direct designs for 3-input XOR function for low-power and high-speed applications
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/00207211003646944
Reference24 articles.
1. A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
2. Cheng, K. H. and Hsieh, V. C. ‘High Efficient 3-input XOR for Low-Voltage Low-Power High-Speed Applications’. Proceedings of First IEEE Asia-Pacific Conference ASICs. pp.166–169.
3. Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
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