Lot-to-order matching for a semiconductor assembly and test facility-Reference-Cited by-同舟云学术

Lot-to-order matching for a semiconductor assembly and test facility

Published:1999-11 Issue:11 Volume:31 Page:1103-1111
ISSN:0740-817X
Container-title:IIE Transactions
language:en
Short-container-title:IIE Transactions

Author:

KNUTSON KRAIG,KEMPF KARL,FOWLER JOHN,CARLYLE MATT

Publisher

Informa UK Limited

Subject

Industrial and Manufacturing Engineering

Link

http://www.tandfonline.com/doi/pdf/10.1080/07408179908969911

Reference15 articles.

1. An LP-based approach to cutting stock problems with multiple objectives

2. Smith , S.P. , Keng , N. , Soto , L. , Bautista , C. , Skinner , J. and Burdett , D. ( 1996 ) AutoPlan planning and scheduling semiconductor assembly/test operations using simulation . Unpublished paper presented at SEMICON West 1996 .

3. A comparative evaluation of heuristics for container loading

4. Cutting stock problems and solution procedures

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