Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags

Author:

Hocquet Cédric,Kamel Dina,Regazzoni Francesco,Legat Jean-Didier,Flandre Denis,Bol David,Standaert François-Xavier

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Software

Cited by 25 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and implementation of low power Advanced Encryption Standard cryptocore utilizing dynamic pipelined asynchronous model;Integration;2023-11

2. Resource-Constrained Encryption: Extending Ibex with a QARMA Hardware Accelerator;2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP);2023-07

3. Realizing Power-efficient Encryption Communication for Computational RFID Tags;2022 Tenth International Conference on Advanced Cloud and Big Data (CBD);2022-11

4. A new ASIC implementation of an advanced encryption standard (AES) crypto-hardware accelerator;Microelectronics Journal;2021-11

5. Area-Efficient Nano-AES Implementation for Internet-of-Things Devices;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-01

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