A low-area unified hardware architecture for the AES and the cryptographic hash function ECHO

Author:

Beuchat Jean-Luc,Okamoto Eiji,Yamazaki Teppei

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Software

Reference30 articles.

1. Aranha, D.F., Beuchat, J.-L., Detrey, J., Estibals, N.: Optimal Eta pairing on supersingular genus-2 binary hyperelliptic curves. Cryptology ePrint Archive, Report 2010/559 (2010)

2. Aumasson, J.-P., Henzen, L., Meier, W., Phan, R.C.-W.: SHA-3 proposal BLAKE (version 1.3). http://www.131002.net/blake (2009)

3. Baldwin, B., Byrne, A., Hamilton, M., Hanley, N., McEvoy, R.P., Pan, W., Marnane, W.P.: FPGA implementations of SHA-3 candidates: CubeHash, Grøstl, LANE, Shabal and Spectral Hash. Cryptology ePrint Archive, Report 2009/342 (2009)

4. Baldwin, B., Byrne, A., Lu, L., Hamilton, M., Hanley, N., O’Neill, N., Marnane, W.P.: A hardware wrapper for the SHA-3 hash algorithms. Cryptology ePrint Archive, Report 2010/124 (2010)

5. Benadjila, R., Billet, O., Gilbert, H., Macario-Rat, G., Peyrin, T., Robshaw, M., Seurin, Y.: SHA-3 proposal: ECHO. http://crypto.rd.francetelecom.com/echo (2009)

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