Performance Analysis of Vedic Multiplier Using High Performance XOR-MUX Based Adder for Fast Computation
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Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-2631-0_60
Reference24 articles.
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3. Lin, J., Hwang, Y., Sheu, M., Ho, C.: A novel high-speed and energy efficient 10-transistor full adder design. IEEE Trans. Circuits Syst. I Regul. Pap. 54(5), 1050–1059 (2007). https://doi.org/10.1109/TCSI.2007.895509
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