Comparative Analysis of Different Low Band Gap Source Materials in Heterojunction Hetero-Dielectric GAA TFET-Reference-Cited by-同舟云学术

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Comparative Analysis of Different Low Band Gap Source Materials in Heterojunction Hetero-Dielectric GAA TFET

Published:2022 Issue: Volume: Page:591-598
ISSN:1876-1100
Container-title:Lecture Notes in Electrical Engineering
language:
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Author:

Tiwari Chandni,Mishra Varun,Haque Afreen Anamul,Verma Yogesh Kumar,Gupta Santosh Kumar

Publisher

Springer Nature Singapore

Link

https://link.springer.com/content/pdf/10.1007/978-981-19-2631-0_51

Reference17 articles.

1. Dreslinski, R.G., Wieckowski, M., Blaauw, D., Sylvester, D., Mudge, T.: Near-threshold computing: reclaiming Moore’s law through energy efficient integrated circuits. Proc. IEEE 98(2), 253–266 (2010). https://doi.org/10.1109/JPROC.2009.2034764

2. Datta, S., Liu, H., Narayanan, V.: Tunnel FET technology: a reliability perspective. Microelectron. Reliab. 54(5), 861–874 (2014). https://doi.org/10.1016/j.microrel.2014.02.002

3. Seabaugh, A.C., Zhang, Q.: Low-voltage tunnel transistors for beyond CMOS logic. Proc. IEEE 98(12), 2095–2110 (2010). https://doi.org/10.1109/JPROC.2010.2070470

4. Beohar, A., Yadav, N., Vishvakarma, S.K.: Analysis of trap-assisted tunnelling in asymmetrical underlap 3D-cylindrical GAA-TFET based on hetero-spacer engineering for improved device reliability. Micro Nano Lett. 12(12), 982–986 (2017). https://doi.org/10.1049/mnl.2017.0311

5. Musalgaonkar, G., Sahay, S., Saxena, R.S., Kumar, M.J.: A line tunneling field-effect transistor based on misaligned core-shell gate architecture in emerging nanotube FETs. IEEE Trans. Electron. Devices 66(6), 2809–2816 (2019). https://doi.org/10.1109/TED.2019.2910156

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1. Process Variation Impact on Dual Dielectric Gate-All-Around Tunnel FETs;2024 International Conference on Computer, Electrical & Communication Engineering (ICCECE);2024-02-02

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