Optimized VLSI Design of Squaring Multiplier Using Yavadunam Sutra Through Deficiency Bits Reduction
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-5550-1_36
Reference9 articles.
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3. Abdel-Aty-Zohdy HS, Hiasat AA (2002) VLSI design and implementation of an improved squaring circuit by combinational logic. In: Conference record of the thirty-first Asilomar conference on signals, systems and computers, pp 426–429
4. Vedic Mathematics. [Online]. Available: Accessed: 15 Apr 2021. https://en.wikipedia.org/w/index.php?title=Vedic_Mathematics&oldid=1023124798
5. Rani DU (2011) Vedic mathematics—a controversial origin but a wonderful discovery. Indian J Appl Res 4:342–343
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