A Single Electron Transistor-Based Floating Point Multiplier Realization at Room Temperature Operation
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-6737-5_4
Reference20 articles.
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2. Parekh R, Beauvais J, Drouin D (2014) SET logic driving capability and its enhancement in 3-D integrated SET–CMOS circuit. Microelectron J 45(8):1087–1092
3. Maeda K, Okabayashi N, Kano S, Takeshita S, Tanaka D, Sakamoto M, Teranishi T, Majima Y (2012) Logic operations of chemically assembled single-electron transistor. ACS Nano 6(3):2798–2803
4. Khan MH (2015) Single-electron transistor based implementation of NOT, Feynman, and Toffoli Gates. In: IEEE international symposium on multiple-valued logic 2015, pp 66–71. IEEE, Waterloo
5. Miralaie M, Mir A (2016) Performance analysis of single-electron transistor at room-temperature for periodic symmetric functions operation. J Eng 10:352–356
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