Design of Digital FIR Filters for Low Power Applications-Reference-Cited by-同舟云学术

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Design of Digital FIR Filters for Low Power Applications

Published:2020 Issue: Volume: Page:433-440
ISSN:2194-5357
Container-title:Intelligent Computing in Engineering
language:
Short-container-title:

Author:

Gunasekaran ,Ramesh G. P.

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-15-2780-7_48

Reference9 articles.

1. Kumar A, Goyal AK (2012) Study of various full adders using tanner EDA tool. Int J Comput Sci Technol 3:581–585

2. Wang S-H, Liang Y-Y, Kuo T-Y, Mak W-K (2012) Power-driven flip-flop merging and relocation. IEEE Trans Comput Aided Des Integr Circuits Syst 31(2):3677–3685. https://doi.org/10.1109/TCAD.2011.2177460

3. Lin MP-H, Hsu C-C, Chang Y-T (2011) Post-placement power optimization with multi-bit flip-flops. IEEE Trans Comput Aided Des Integr Circuits Syst 30(12):3480–3491. https://doi.org/10.1109/TCAD.2011.2165716

4. Prakash G, Sathishkumar K, Sakthibharathi B, Saravanan S, Vijaysai R (2013) Achieveing reduced area by multi-bit flip flop design. In: 2013 international conference on computer communication and informatics. IEEE, pp 1–4

5. Li XY, Jia S, Liu L, Wang Y, Zhang G (2012) Design of novel, semitransparent flip-flops for high speed and low power application. Science. (China Press and Springer, Berlin Heidelberg). https://doi.org/10.1007/s11432-012-4621-8

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