An Optimized Area Efficient Implementation of FIR Filter Using Shift Add Multiplier with Carry Look Ahead Adder-Reference-Cited by-同舟云学术

An Optimized Area Efficient Implementation of FIR Filter Using Shift Add Multiplier with Carry Look Ahead Adder

Published:2021 Issue: Volume: Page:745-754
ISSN:2194-5357
Container-title:Cognitive Informatics and Soft Computing
language:
Short-container-title:

Author:

Samyuktha Sripathi,Duggineni Chaitanya,Swetha N.,Valiveti Hima Bindu

Publisher

Springer Singapore

Link

https://link.springer.com/content/pdf/10.1007/978-981-16-1056-1_58

Reference15 articles.

1. Belghadr, A., Jaberipur, G.: FIR filter realization via deferred endaround carry modular addition. IEEE Trans. Circuits Syst. I, Reg. Papers to be published, (2018). https://doi.org.10.1109/TCSI.2018.2798595

2. Meher, P.K., Stouraitis, T.: Arithmetic Circuits for DSP Applications. Wiley, Hoboken, NJ, USA (2017)

3. Dwaipayan, R. et al.: Efficient shift-add implementation of fir filters using variable partition hybrid form structures. IEEE Trans. Circuits Syst. I (2018)

4. Kumm, M., Zipf, P.: Multiple constant multiplication optimizations for field programmable gate arrays. Springer, Wiesbaden, Germany (2016)

5. Lo, X. et al.: Novel structure for areaefficient implementation of FIR filters. IEEE Trans. Circuits Syst. II Exp. Briefs. 64(10), 1212–1216 (2017)

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. VLSI implementation of vedic multiplier and carry look ahead adder based FIR filter for denoising EEG signal;INTELLIGENT BIOTECHNOLOGIES OF NATURAL AND SYNTHETIC BIOLOGICALLY ACTIVE SUBSTANCES: XIV Narochanskie Readings;2023

2. Efficient variable-coefficient RNS-FIR filters with no restriction on the moduli set;Signal, Image and Video Processing;2022-02-14