Energy Efficient Memory Architecture for High Performance and Low Power Applications Under Sub-threshold Regime
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-4990-6_21
Reference13 articles.
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5. Weste NHE, Harris D, Banerjee A (2006) CMOS VLSI design, 3rd edn. Pearson Education, pp 129–130
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