Order Analysis for Translating NESL Programs into Efficient GPU Code
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Publisher
Springer Singapore
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http://link.springer.com/content/pdf/10.1007/978-981-13-9190-3_34
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3. Zhang, Y., Mueller, F.: CuNesl: compiling nested data-parallel languages for SIMT architectures. In: Proceedings of 41st International Conference on Parallel Processing (ICPP), pp. 340–349 (2012)
4. Huang, M.-H., Yang, W.: Partial flattening: a compilation technique for irregular nested parallelism on GPGPUs. In: Proceedings of 45th International Conference on Parallel Processing (ICPP) (2016)
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1. Order Analysis for Translating NESL Programs into Efficient GPU Code;Communications in Computer and Information Science;2019
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