Author:
Drechsler Rolf,Mahzoon Alireza,Weingarten Lennart
Publisher
Springer Nature Singapore
Cited by
5 articles.
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1. Polynomial Formal Verification of Multi-Valued Logic Circuits within Constant Cutwidth Architectures;2024 IEEE 54th International Symposium on Multiple-Valued Logic (ISMVL);2024-05-28
2. PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor;Proceedings of the 18th ACM International Symposium on Nanoscale Architectures;2023-12-18
3. Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal Verification;Proceedings of the 21st ACM-IEEE International Conference on Formal Methods and Models for System Design;2023-09-21
4. A Class of Polynomially Verifiable Circuits of Logarithmic Depth;2023 13th International Conference on Cloud Computing, Data Science & Engineering (Confluence);2023-01-19
5. Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof Engine;Lecture Notes in Computer Science;2023