Optimization of 2D Ge-Pocket Asymmetric Dual-Gate Tunnel FETs
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Publisher
Springer Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-3767-4_26
Reference13 articles.
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2. Ionescu AM, Riel H (2011) Tunnel field-effect transistors as energy efficient electronic switches. Nature 479:329–337. https://doi.org/10.1038/nature10679
3. Jeon K et al (2010) Si tunnel transistors with a novel silicided source and 46 mV/dec swing. In: Proceedings of VLSI, pp 121–122. https://doi.org/10.1109/VLSIT.2010.5556195
4. Knoll L et al (2013) Inverters with strained Si nanowire complementary tunnel field-effect transistors. IEEE Electron Dev Lett 34(6):813–815. https://doi.org/10.1109/LED.2013.2258652
5. Huang Q et al (2014) Comprehensive performance re-assessment of TFETs with a novel design by gate and source engineering from device/circuit perspective. IEDM Tech Dig 13.3.1–13.3.4
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