Study of Noise Behavior of Heterojunction Double-Gate PNPN TFET for Different Parameter Variations
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Publisher
Springer Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-3767-4_8
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1. Impact of Drain Thickness Asymmetry on DC and Analog/RF Performance of an n-type SiGe/Si Double Gate TFET;Silicon;2022-10-18
2. Ambipolarity Suppression of a Double Gate Tunnel FET using High-k Drain Dielectric Pocket;ECS Journal of Solid State Science and Technology;2022-01-01
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