Design of 22 nm Strained Silicon Channel Gate All Around FET Device
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Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-0745-6_45
Reference15 articles.
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3. Rajendran S, Lourde RM (2015) FinFETs and their application as load switches in micro mechatronics. In: International symposium on nanoelectronic and information systems. IEEE, Indore, pp. 152–157. https://doi.org/10.1109/iNIS.2015
4. Kumar A, Pattanaik M, Srivastava P, Jha KK (2020) Reduction of drain induced barrier lowering in DM-HD-NA GAAFET for RF applications. IET Circ Dev Syst 14(3):270–275. https://doi.org/10.1049/iet-cds.2019
5. Kumar M, Dubey S, Tiwari PK, Jit S (2013) An analytical model of threshold voltage for short-channel double-material-gate (DMG) strained-Si (s-Si) on Silicon-Germanium-on-Insulator SGOI MOSFET. J Comput Electron 12(1):20–28
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