Performance Analysis of Cache Memory Architecture for Core Processor
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-7664-2_39
Reference20 articles.
1. Eslami N, Ebrahimi B, Shakouri E et al (2020) A single-ended low leakage and low voltage 10T SRAM cell with high yield. Analog Integr Circ Sig Process 105:263–274
2. Bazzi, H., Harb, A., Aziza, H. et al. RRAM-based non-volatile SRAM cell architectures for ultra-low-power applications. Analog Integr Circ Sig Process (2020).
3. S. Gupta, K. Gupta, B. H. Calhoun, and N. Pandey, “Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 3, pp. 978-988, March 2019.
4. H. Dounavi, Y. Sfikas, and Y. Tsiatouhas, “Periodic Aging Monitoring in SRAM Sense Amplifiers,” 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), Platja d'Aro, 2018, pp. 12-16.
5. Ahmad S, Iqbal B, Alam N, Hasan M (2018) Low leakage fully half-select-free robust SRAM cells with BTI reliability analysis. IEEE Trans Device Mater Reliab 18(3):337–349
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Security and Privacy of Blockchain-Based Single-Bit Cache Memory Architecture for IoT Systems;IEEE Access;2022
1.学者识别学者识别
2.学术分析学术分析
3.人才评估人才评估
"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370
www.globalauthorid.com
TOP
Copyright © 2019-2024 北京同舟云网络信息技术有限公司 京公网安备11010802033243号 京ICP备18003416号-3