Design and Analysis of Energy-Efficient Logic Gates Using INDEP Short Gate FinFETs at 10 nm Technology Node
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-8550-7_3
Reference15 articles.
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5. Guo X, Verma V, Gonzalez-Guerrero P, Mosanu S, Stan MR (2017) Back to the future: digital circuit design in the FinFET era. J Low Power Electron 13(3):338–355
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