Parallel directed graph algorithms on directional processor arrays with reconfigurable bus systems-Reference-Cited by-同舟云学术

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Parallel directed graph algorithms on directional processor arrays with reconfigurable bus systems

Published:1999-06 Issue:2 Volume:17 Page:175-200
ISSN:0288-3635
Container-title:New Generation Computing
language:en
Short-container-title:New Gener Comput

Author:

Kuo Chi-Jung,Hsu Chiun-Chieh,Fang Wei-Chen

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/BF03037435.pdf

Reference17 articles.

1. Akl, S. G.,The Design and Analysis of Parallel Algorithms, Prentice Hall, NJ, 1989.

2. Chen, C. H., “AnO(1) time algorithm for string matching,”Intern. J. Computer Math., 42, pp. 185–191, 1992.

3. Chen, G. H. and Wang, B. F., “Sorting and computing convex hulls on processor arrays with reconfigurable bus systems,”Information Sciences, 72, pp. 191–206, 1993.

4. Chen, Y. C. and Chen, W. T., “Constant time sorting on reconfigurable meshes,”IEEE Transactions on Computers, 43 (6), pp. 749–751, 1994.

5. Fragopoulou, P., “On the efficient summation of n numbers on an n-processor reconfigurable mesh,”Parallel Processing Letters, 3(1), pp. 71–78, 1993.

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. THE TRANSITIVE CLOSURE AND RELATED ALGORITHMS OF DIGRAPH ON THE RECONFIGURABLE ARCHITECTURE;Parallel Processing Letters;2011-03

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