TTHLS: an HLS tool for testable hardware generation
Author:
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Software
Link
http://link.springer.com/article/10.1007/s10617-017-9192-x/fulltext.html
Reference22 articles.
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2. Dutton BF, Stroud CE (2010) Soft core embedded processor-based built-in self-test of FPGAs: a case study. In: Proceedings of 42nd southeastern symposium on system theory (SSST), Tyler, TX, USA, 7–9 March 2010, pp 313–317
3. Abramovici M, Stroud CE (2001) BIST-based test and diagnosis of FPGA logic blocks. IEEE Trans VLSI Syst 9(1):159–172
4. Vemula S, Stroud CE (2006) Built-in self test for programmable I/O buffers in FPGAs and SOCs. In: Proceedings of 38th southeastern symposium on system theory, Cookeville, TN, USA, 5–7 March 2006, pp 534–538
5. Niamat MY, Sahni A, Jamali MM (2007) A built-in self test scheme for automatic interconnect fault diagnosis in multiple and single FPGA systems. In: Proceedings of 50th midwest symposium on circuits and systems, Montreal, Que, Canada, 5–8 August 2007, pp 229–232
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