1. M. Abramovici, M. A. Breuer, A. D. Friedman, “Digital Systems Testing and Testable Design”, Computer Science Press, Freeman, New York, 1990
2. M. S. Abadir, M. A. Breuer, “Constructing Optimal Test Schedules for VLSI Circuits Having Built-in Test Hardware”, in Proc. International Symposium on Fault-Tolerant Computing (FTCS-15), 1985, pp. 165–170
3. M. S. Abadir, M. A. Breuer, “A Knowledge-Based System for Designing Testable VLSI Chips”, IEEE Design&Test, vol. 2, no. 4, Aug. 1985, pp. 56–68
4. M. S. Abadir, M. A. Breuer, “Test Schedules for VLSI Circuits Having Built-in Test Hardware”, IEEE Transactions on Computers, vol. 35, no. 4, April 1986, pp. 361–367
5. M. Abramovici, J. J. Kulikowski, R. K. Roy, “The Best Flip-Flops to Scan”, in Proc. International Test Conference, 1991, pp. 166–173