An energy-efficient reconfigurable analog-to-digital converter for orthopedic implants

Author:

Qu Wenchao,Islam Syed Kamrul,Mahbub Ifana,Randall Terence C.,To G.,Mahfouz M. R.

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference36 articles.

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3. Verma, N., & Chandrakasan, A. P. (2007). An ultra low energy 12-bit rate-resolution scalable SAR ADC for wireless sensor nodes. IEEE Journal of Solid-State Circuits, 42, 1196–1205.

4. Malla, P., Lakdawala, H., Kornegay, K., Soumyanath, K. (2008). A 28mW spectrum-sensing reconfigurable 20 MHz 72 dB-SNR 70 dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX receivers, ISSCC 2008. Digest of Technical Papers. IEEE International, pp. 496–631.

5. Castro-López, R., Morgado, A., Guerra, O., Río, R., Rosa, J. M., Pérez-Verdú, B., et al. (2009). Systematic top-down design of reconfigurable ΣΔ modulators for multi-standard transceivers. Analog Integrated Circuits and Signal Processing, 58, 227–241.

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3. A low-power ADC with compact AGC loop for LR-WPAN receivers;Analog Integrated Circuits and Signal Processing;2015-04-25

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