Author:
Park Jung-woong,Choi Ho-yong,Kim Nam-soo
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference10 articles.
1. Hwang, I. C., Song, S. H., & Kim, S. W. (2001). A digitally controlled phase-locked loop with a digital phase-frequency detector for fast acquisition. IEEE Journal of Solid State Circuits, 36(10), 1574–1581.
2. Fazeel, H. S., Raghavan, L., Srinivasaraman, C., & Jain, M. (2009). Reduction of current mismatch in PLL charge pump. In Proceedings of the IEEE International Symposium on VLSI (ISVLSI) 2009 (pp.7–12).
3. Karimi-Ghartemani, M., Khajehoddin, S. A., Jain, P. K., & Bakhshai, A. (2012). Deviation and design of in-loop filters in phase- locked loop systems. IEEE Transactions on Instrumentation and Measurement, 61(4), 930–940.
4. Zaziabl, A. (2011). Low power 1 GHz charge pump phase-locked loop in 0.18 µm CMOS process. In Proceedings of the IEEE International Conference on PRIME 2011 (pp.201–204).
5. Zhang, Y., Zimmermann, N., Wunderlich, R. & Heinen, S. (2010). A low mismatch symmetric charge pump for the application in PLLs. In Proceedings of the IEEE International Conference on MIXDES 2010 (pp.277–281).
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