Hardware design focusing in the tradeoff cost versus quality for the H.264/AVC fractional motion estimation targeting high definition videos

Author:

Sanchez Gustavo,Corrêa Marcel,Noble Diego,Porto Marcelo,Bampi Sergio,Agostini Luciano

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference19 articles.

1. ITU-T e ISO/IEC JTC1. (1994). Generic coding of moving pictures and associated audio information—Part 2: video. ITU-T Rec. H.262 and ISO/IEC 13818–2 (MPEG-2).

2. Vanne, J., Aho, E., Kuusilinna, K., & Hämäläinen, T. (2009). A configurable motion estimation architecture for block-matching algorithms. New York: IEEE Transactions on Circuits and Systems for Video Technology.

3. Alencar, M. (2009). Digital television systems. Cambridge: Cambridge University Press.

4. JCT. (2011). Working draft 3 of high-efficiency video coding. JCTVC-E603.

5. Richardson, I. (2003). H.264 and MPEG-4 video compression–video coding for next-generation multimedia. Chichester: Wiley.

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4. Towards optimal use of pel decimation to trade off quality for energy;Analog Integrated Circuits and Signal Processing;2015-06-20

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