A switchable DC offset cancellation circuit for time-based degradation correction-Reference-Cited by-同舟云学术

A switchable DC offset cancellation circuit for time-based degradation correction

Published:2020-09-16 Issue:3 Volume:106 Page:485-491
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Erol Didem,Güngördü Ali Doğuş,Dündar Günhan,Yelten Mustafa Berke^ORCID

Funder

Türkiye Bilimsel ve Teknolojik Arastirma Kurumu

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

https://link.springer.com/content/pdf/10.1007/s10470-020-01714-w.pdf

Reference17 articles.

1. Babayan-Mashhadi, S., & Lotfi, R. (2012). An offset cancellation technique for comparators using body-voltage trimming. Analog Integrated Circuits and Signal Processing, 73(3), 673.

2. Miyahara, M., & Matsuzawa, A. (2009).In 2009 IEEE Asian Solid-State Circuits Conference (IEEE) (pp. 233–236).

3. Sansen, W. M. (2007). Analog design essentials (Vol. 859). Berlin: Springer.

4. Pham, D. D., Brinkhoff, J., Kang, K., Ang, C. W., Lin, F., & Heng, C. H. In Proceedings of the 2009 12th International Symposium on Integrated Circuits (IEEE, 2009) (pp. 429–432).

5. Niwa, A., Takagi, S., Sato, T., & Fuji, N. In 2008 3rd International Symposium on Communications, Control and Signal Processing (IEEE, 2008) (pp. 584–587).

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