Author:
Souri M.,Ghaznavi-Ghoushchi M. B.
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference27 articles.
1. Dai, L. & Harjani, R. (2003). Introduction to PLLs, design of high-performance CMOS voltage-controlled oscillators, Springer, 708, 9–26.
2. Chen, P. L., Chung, C. C., & Lee, C. Y. (2005). A portable digitally controlled oscillator using novel varactors. IEEE Transactions on Circuits and Systems II: Express Briefs, 52, 233–237.
3. Narendran, B. & Parameshwaran, R. (2014). Comparison of various optimized architectures of DCO for ADPLL. Contemporary Engineering Sciences, 7(9), 419–425.
4. Mendel, S., Graz, & Vogel, C. (2008). Improved lock-time in all-digital phase-locked loops due to binary search acquisition. In 15th IEEE International Conference on Electronics, Circuits and Systems, 2008 (ICECS 2008) (pp. 384–387).
5. Mendel, S., Vogel, C. & Da Dalt, N. (2009). Signal and timing analysis of a phase-domain all-digital phase-locked loop with reference retiming mechanism. In MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems, MIXDES’09 (pp. 681–687).
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