A novel serial link transceiver, using a new combination of MPPM and PAM schemes-Reference-Cited by-同舟云学术

A novel serial link transceiver, using a new combination of MPPM and PAM schemes

Published:2018-06-16 Issue:1 Volume:97 Page:75-85
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Ghaderi Noushin^ORCID,Allasvand Erfan,Mohammadi Abouzar,Kamran Saman

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/article/10.1007/s10470-018-1233-2/fulltext.html

Reference14 articles.

1. Foley, D. J., & Flynn, M. P. (2002). A low-power 8-PAM serial transceiver in 0.5-μm digital CMOS. IEEE Journal of Solid-State Circuits, 37, 310–316.

2. Song, B., Kim, K., Lee, J., Chung, J., Youngjung, C., & Burm, J. (2014). A 13.5-mW 10 Gb/s 4-PAM serial link transmitter in 0.13 µm CMOS technology. IEEE Transactions on Circuits and Systems, 61(9), 646.

3. Yang, C.-Y., & Lee, Y. (2008). A PWM and PAM signaling hybrid technology for serial-link transceivers. IEEE Transactions on Instrumentation and Measurement, 57, 1058–1070.

4. Ghaderi, N., & Hadidi, K. H. (2009). A CMOS 3.2 Gb/s serial link serial link transceiver, using PWM and PAM scheme. In European Conference on Circuit Theory and Design, Antalya, ECCTD09 (pp. 23–27).

5. Ghaderi, N., Hadidi, K. H., & Khoei, A. (2011). A CMOS 3.2 Gb/s serial link transceiver, using a new PWAM scheme. Analog Integrated Circuits and Signal Processing, 71(3), 421–432.

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