A simple and high performance charge pump based on the self-cascode transistor
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-019-01478-y.pdf
Reference29 articles.
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2. Chuang, C. N., & Liu, S. I. (2007). A 0.5–5-ghz wide-range multiphase DLL with a calibrated charge pump. IEEE Journal of Solid-State Circuits, 54(11), 939–943. https://doi.org/10.1109/TCSII.2007.904155 .
3. Fiorenza, J. K., Sepke, T., Holloway, P., Sodini, C. G., & Lee, H. S. (2006). Comparator-based switched-capacitor circuits for scaled CMOS technologies. IEEE Journal of Solid-State Circuits, 41(12), 2658–2668. https://doi.org/10.1109/JSSC.2006.884330 .
4. Johnson, M. G., & Hudson, E. L. (1988). A variable delay line PLL for CPU- coprocessor synchronization. IEEE Journal of Solid-State Circuits, 23(5), 1218–1223. https://doi.org/10.1109/4.5947 .
5. Charles, C. T., & Allstot, D. J. (2008). A buffered charge pump with zero charge sharing. In IEEE international symposium on circuits and systems (pp. 2633–2636). https://doi.org/10.1109/ISCAS.2008.4541997 .
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