Systematic design of CNTFET based OTA and Op amp using gm/ID technique
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-019-01492-0.pdf
Reference32 articles.
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2. Flandre, D., Viviani, A., Eggermont, J.-P., Gentinne, B., & Jespers, P. G. A. (1997). Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology. IEEE Journal of Solid-State Circuits, 32(7), 1006–1012.
3. Akbari, M., & Hashemipour, O. (2015). Design and analysis of folded cascode otas using gm/ID methodology based on flicker noise reduction. Analog Integrated Circuits and Signal Processing, 83(3), 343–352.
4. Seth, S., & Murmann, B. (2013). Settling time and noise optimization of a three-stage operational transconductance amplifier. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(5), 1168–1174.
5. Samiei, M., & Hashemipour, O. (2018). Design of active inductor-based current-controlled oscillators using gm/id methodology. AEU-International Journal of Electronics and Communications, 87, 1–9.
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