Buffer insertion for delay minimization in RLC interconnects using cuckoo optimization algorithm
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-018-1318-y.pdf
Reference24 articles.
1. Ismail, Y. I., & Friedman, E. G. (2000). Effects of inductance on the propagation delay and repeater insertion in VLSI circuits. IEEE Transactions on Very Large Scale Integration Systems, 8(2), 195–206.
2. Alpert, C. J., Devgan, A., & Quay, S. T. (1999). Buffer insertion for noise and delay optimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(11), 1633–1645.
3. Chu, C., Wong, D. F. (1997). A new approach to simultaneous buffer insertion and wire sizing. In Proceedings IEEE/ACM international conference on computer-aided design (pp. 614–621).
4. Ismail, Y. I., & Friedman, E. G. (2001). Repeater insertion in tree structured inductive interconnect. IEEE Transactions on Circuits and Systems, 48(5), 471–481.
5. Chu, C., & Wong, D. F. (2001). Closed form solution to simultaneous buffer insertion/sizing and wire sizing. ACM Transactions on Design Automation of Electronic Systems, 6, 343–371.
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