On V–V/V–I type double balanced CMOS multiplier utilizing triode-region translinear principle
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-019-01516-9.pdf
Reference43 articles.
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3. Babanezhad, J. N., & Temes, Gabor C. (1985). A 20-V four-quadrant CMOS analog multiplier. IEEE Journal of Solid-State Circuits,20(6), 1158–1168.
4. De Lima, J. A. (1989). Design of a micropower CMOS four-quadrant multiplier based on the translinear principle. In ESSCIRC ‘89: Proceedings of the 15th European solid-state circuits conference
5. Tanno, K., Sugahara, Y., & Tamura, H. (2011). High-linear four-quadrant multiplier based on MOS weak-inversion region translinear principle with adaptive bias technique. In IEEE.
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