A New Static Differential CMOS Logic with Superior Low Power Performance
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-005-6791-4.pdf
Reference7 articles.
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3. P. Ng, P.T. Balsara, and D. Steiss, “Performance of CMOS differential circuits,” IEEE J. of Solid-State Circuits, vol. 31, no. 6, pp. 841–846, 1996.
4. M.W. Allam and M.I. Elmasry, “Dynamic Current Mode Logic (DyCML): A new low-power high-performance logic style.” IEEE J. of Solid-State Circuits, vol. 36, no. 3, pp. 550–558, 2001.
5. A.M. Fahim and M.I. Elmasry, “Low-power high-performance arithmetic circuits and architectures.” IEEE J. of Solid-State Circuits, vol. 37, no. 1, pp. 90–94, 2002.
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