A 2nd-order sigma-delta mismatch-shaping current-steering DAC for zigbee transmitters-Reference-Cited by-同舟云学术

A 2nd-order sigma-delta mismatch-shaping current-steering DAC for zigbee transmitters

Published:2014-08-08 Issue:1 Volume:81 Page:145-152
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Li Di,Yang Yintang,Shi Zuochen,Li Yani

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/content/pdf/10.1007/s10470-014-0375-0.pdf

Reference36 articles.

1. Clara, M., Klatzer, W., Seger B., Giandomenico, A.D., & Gori, L. (2007). A 1.5 V 200MS/s 13b 25mW DAC with randomized nested background calibration in 0.13 μm CMOS. IEEE inst. Solid-State Conf. (pp. 250–251).

2. Plas, G. V. D., Vandenbussche, J., Sansen, W., Steyaert, M., & Gielen, G. (1999). A 14-bit intrinsic accuracy Q2 random walk CMOS DAC. IEEE Journal of Solid-State Circuits, 34(12), 1708–1718.

3. Irfansyah, A.N., Lehmann, T., Jenkins, J., & Hamilton, T.J. (2013). Analysis and design considerations of systematic nonlinearity for sigma-delta current-steering dac. IEEE TENCON Spring Conference (pp. 108–111).

4. Dong, C.Z., Lu, T.J., Wang, Z.M., & Zhou, L. (2010). A multi-bit sigma-delta modulator and new dwa used in an audio dac. 2nd International Conference on Computer Technology and Development (ICCTD) (pp.429–431).

5. Cheng, L., Ye, F., Yang, H., Li, N., Xu, J., & Ren, J. (2011). Nyquist-rate time interleaved current-steering DAC with dynamic channel matching. IEEE International Symposium on Circuits and Systems (pp. 5–8).

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