A 0.003-mm2, 0.35-V, 82-pJ/conversion ultra-low power CMOS all digital temperature sensor for on-die thermal management
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-012-9988-3.pdf
Reference36 articles.
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2. Pedram, M., & Nazarian, S. (2006). Thermal modeling, analysis, and management in VLSI circuits: Principles and methods. Proceedings of the IEEE, 94(8), 1487–1501.
3. Chen, D., Li, E., Rosenbaum, E., & Kang, S. M. (2000). Interconnect thermal modeling for accurate simulation of circuit timing and reliability. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 19(2), 197–205.
4. Brooks, D., Dick, R. P., Joseph, R., & Li, S. (2007). Power, thermal, and reliability modeling in nanometer-scale microprocessors. IEEE Micro, 27(3), 49–62.
5. Ajami, A. H., Banerjee, K., Pedram, M., & van Ginneken, L. P. P. P. (2001). Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs. In Proceedings of IEEE/ACM Design Automation Conference (DAC) (pp. 567–572).
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