Verification and diagnosis of digital systems by ternary reasoning-Reference-Cited by-同舟云学术

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Verification and diagnosis of digital systems by ternary reasoning

Published: Issue: Volume: Page:55-67
ISSN:
Container-title:Lecture Notes in Computer Science
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Author:

Wahba Ayman M.,Aas Einar J.

Publisher

Springer-Verlag

Link

http://www.springerlink.com/index/pdf/10.1007/BFb0021714

Reference15 articles.

1. E.J. Aas, K.A. Klingsheim and T. Steen, “Quantifying Design Quality: A Model and Design Experiments”, Proc. EuroASIC'92, IEEE Comp. Soc., 1992, pp. 172–177.

2. D.D. Borrione, L.V. Pierre and A.M. Salem, “Formal Verification of VHDL Descriptions in the Prevail Environment”, IEEE Design and Test, Vol. 9, No. 2, June 1992, pp. 42–56.

3. R.E. Bryant, “Graph-Based Algorithms for Boolean Function Manipulation”, IEEE Trans. on Comp., Vol. C-35, No. 8, Aug. 1986, pp. 677–691.

4. R.E. Bryant, “A Methodology for Hardware Verification Based on Logic Simulation”, Journ. of the ACM, Vol. 38, No. 2, April 1991, pp. 299–328.

5. R.E. Bryant, D.L. Beatty and C.J.H. Seger, “Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation”, Proc.28th DAC, 1991, pp. 397–402.

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Exact diagnosis using boolean satisfiability;Proceedings of the 35th International Conference on Computer-Aided Design;2016-11-07

2. A method for automatic design error location and correction in combinational logic circuits;Journal of Electronic Testing: Theory and Applications (JETTA);1996-04

3. Design error diagnosis in sequential circuits;Lecture Notes in Computer Science;1995

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