Fast RNS FPL-based Communications Receiver Design and Implementation-Reference-Cited by-同舟云学术

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Fast RNS FPL-based Communications Receiver Design and Implementation

Published:2002 Issue: Volume: Page:472-481
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
Short-container-title:

Author:

Ramírez J.,García A.,Meyer-Baese U.,Lloris A.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-46117-5_50

Reference20 articles.

1. Graychip, Inc., “GC1012A Digital Tuner Data Sheet”, http://wwws.ti.com/sc/psheets/slws128/slws128.pdf , Feb. 1998.

2. Intersil, Corp., “HSP50306 Digital QPSK Demodulator”, http://www.intersil.com/data/FN/FN4/FN4162/FN4162.pdf , 1998.

3. Pentek, Inc., “Model 4272-Multiband Digital Receiver”, http://www.pentek.com/products/GetDS.cfm/4272.PDF?Filename=ACF405.pdf .

4. Altera, Corp., “APEX 20K Programmable Logic Device Family Data Sheet”, http://www.altera.com/literature/ds/apex.pdf , Dec. 2001, v. 4.2.

5. Xilinx, Inc., “Virtex 2.5V Field Programmable Gate Arrays Data Sheet” http://www.xilinx.com/partinfo/ds003-2.pdf , Jul. 2001, v. 2.6.

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1. RNS processor using moduli sets of the form 2ⁿ±1;International Journal of Circuit Theory and Applications;2023-03-21

2. Efficient RNS Realization of High-Speed Arithmetic Multiplier with Respect to Cryptographic Computation;Lecture Notes in Networks and Systems;2022-11-14

3. Efficient Diminished-1 Modulo (2n+1) Adder Using Parallel Prefix Adder;Journal of Circuits, Systems and Computers;2020-02-04

4. Design and Functional Verification of Reversible Logic Based FFT Using OHRNS;Lecture Notes in Electrical Engineering;2019

5. Applications of RNS in Signal Processing;Residue Number Systems;2016

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