Mechanizing verification of arithmetic circuits: SRT division-Reference-Cited by-同舟云学术

Mechanizing verification of arithmetic circuits: SRT division

Published:1997 Issue: Volume: Page:103-122
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Kapur Deepak,Subramaniam M.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/BFb0058026

Reference26 articles.

1. R.E. Bryant, Bit-level Analysis of an SRT Divider Circuit. Tech. Rep. CMU-CS-95-140, Carnegie Mellon University, April 1995.

2. E.M. Clarke, S.M. German and X. Zhao, “Verifying the SRT division algorithm using theorem proving techniques,” Proc. Computer Aided Verification, 8th Intl. Conf. —CAV'96, New Brunswick, July/August 1996, Springer LNCS 1102 (eds. Alur and Henzinger), 111–122.

3. M.D. Ercegovac and T. Lang, Division and Square Root: Digit Recurrence Algorithms and Implementations. Kluwer, 1994.

4. S. German, Towards Automatic Verification of Arithmetic Hardware. Lecture Notes, 1995.

5. D. Kapur, “Rewriting, decision procedures and lemma speculation for automated hardware verification,” Proc. 10th Intl. Conf. Theorem Proving in Higher Order Logics, LNCS 1275 (eds. Gunter and Felty), Murray Hill, NJ, Aug 1997, 171–182.

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