Formal Verification of the VAMP Floating Point Unit-Reference-Cited by-同舟云学术

Formal Verification of the VAMP Floating Point Unit

Published:2005-05 Issue:3 Volume:26 Page:227-266
ISSN:0925-9856
Container-title:Formal Methods in System Design
language:en
Short-container-title:Form Method Syst Des

Author:

Jacobi Christian,Berg Christoph

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s10703-005-1613-y.pdf

Reference49 articles.

1. M.D. Aagaard, R.B. Jones, and R. Kaivola, “Formal verification of iterative algorithms in microprocessors,” in DAC 2000. ACM, 2000.

2. M.D. Aagaard and C.-J.H. Seger, “The formal verification of a pipelined double-precision IEEE floating-point multiplier,” in ICCAD, IEEE, Nov. 1995, pp. 7–10.

3. A.T. Abdel-Hamid, “A hierarchical verification of the IEEE-754 table-driven floating-point exponential function using HOL,” Master’s thesis, Dept. Electrical and Computer Engineering, Concordia University, Montréal, Québec, Canada, 2001.

4. A.T. Abdel-Hamid, S. Taher, and J. Harrison, “Table-driven floating-point exponential function using HOL,” in R.J. Boulton and P.B. Jackson (Eds.), TPHOLs 2001: Supplemental Proceedings, 2001, Informatics Research Report EDI-INF-RR-0046, Univ. Edinburgh, UK.

5. G. Barrett, “Formal methods applied to a floating-point number system,” IEEE Transactions on Software Engineering, Vol. 15, No. 5, pp. 611–621, 1989.

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