An ILP based hierarchical global routing approach for VLSI ASIC design

Author:

Yang Zhen,Vannelli Anthony,Areibi Shawki

Publisher

Springer Science and Business Media LLC

Subject

Control and Optimization

Reference14 articles.

1. Behjat, L.: New modeling and optimization techniques for the global routing problem. PhD thesis, University of Waterloo, ON, Canada (2002)

2. Cheng, L., Song, X.Y., Yang, G.W., Tang, Z.W.: A fast congestion estimator for routing with bounded detours. In: Proceedings of the 2004 conference on Asia South Pacific design automation, pp. 666–670 (2004)

3. Chen, T., Chang, Y.: Multilevel full-chip gridless routing considering optical proximity correction. In: Proceedings of the 2005 conference on Asia South Pacific design automation, pp. 1160–1163 (2005)

4. Chen, T., Chang, Y., Lin, S.: A novel framework for multilevel full-chip gridless routing. In: Proceedings of the 2006 conference on Asia South Pacific design automation, pp. 636–641 (2006)

5. Cong J., Fang J., Zhang Y. (2005): MARS-A multilevel full-chip gridless routing system. IEEE Trans. Comput. Aided Des. 24, 382–394

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