Inherent Limitations of Hybrid Transactional Memory

Author:

Alistarh Dan,Kopinsky Justin,Kuznetsov Petr,Ravi Srivatsan,Shavit Nir

Publisher

Springer Berlin Heidelberg

Reference24 articles.

1. Advanced Synchronization Facility Proposed Architectural Specification, March 2009. http://developer.amd.com/wordpress/media/2013/09/45432-ASF_Spec_2.1.pdf

2. Afek, Y., Levy, A., Morrison, A.: Software-improved hardware lock elision. In: PODC. ACM (2014)

3. Alistarh, D., Eugster, P., Herlihy, M., Matveev, A., Shavit, N.: Stacktrack: an automated transactional approach to concurrent memory reclamation. In: Proceedings of the Ninth European Conference on Computer Systems. EuroSys 2014, pp. 25:1–25:14. ACM, New York (2014)

4. Alistarh, D., Kopinsky, J., Kuznetsov, P., Ravi, S., Shavit, N.: Inherent limitations of hybrid transactional memory (2014). CoRR, abs/1405.5689. http://arxiv.org/abs/1405.5689

5. Ananian, C.S., Asanovic, K., Kuszmaul, B.C., Leiserson, C.E., Lie, S.: Unbounded transactional memory. In: Proceedings of the 11th International Symposium on High-Performance Computer Architecture. HPCA 2005, pp. 316–327. IEEE Computer Society, Washington (2005)

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. The Case for Phase-Based Transactional Memory;IEEE Transactions on Parallel and Distributed Systems;2019-02-01

2. Inherent limitations of hybrid transactional memory;Distributed Computing;2017-06-23

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