A low-jitter low-power monolithically integrated optical receiver for SDH STM-16

Author:

Chen YingMei,Wang ZhiGong,Zhang Li

Publisher

Springer Science and Business Media LLC

Subject

General Computer Science

Reference14 articles.

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3. Sato F, Tezuka H, Soda M, et al. A 2.4 Gb/s receiver and a 1:16 demultiplexer in one chip using a super self-aligned selectively grown SiGe base (SSSB) bipolar transistor. IEEE J Solid State Circuits, 1996, 31: 1451–1457

4. Soda M, Shiori S, Morikawa T, et al. A 2.5-Gb/s one-chip receiver module for Gigabit-To-The-Home (GTTH) system. In: Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, San Diego, USA, 1999. 273–276

5. Soliman S, Yuan F, Raahemifar K. An overview of design techniques for CMOS phase detectors. In: 2002 IEEE International Symposium on Circuits and Systems, Scottsdale, USA, 2002. 457–460

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS;The Journal of China Universities of Posts and Telecommunications;2012-12

2. A 10 GHz multiphase LC VCO with a ring capacitive coupling structure;Science China Information Sciences;2012-09-26

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