Author:
Zhang Lizhong,Wang Yuan,Wang Yize,Zhang Xing,He Yandong
Publisher
Springer Science and Business Media LLC
Reference20 articles.
1. Ker M D, Lin C Y. ESD protection consideration in nanoscale CMOS technology. In: Proceedings of IEEE International Conference on Nanotechnology, Portland, 2011. 720–723
2. Cao J, Xu J Y, Wang Y, et al. A compact SCR model using advanced BJT models and standard SPICE elements. Sci China Inf Sci, 2016, 59: 109302
3. Yin L, Shen L, Jiang H, et al. Impact of self-heating effects on nanoscale Ge p-channel FinFETs with Si substrate. Sci China Inf Sci, 2018, 61: 062401
4. Yang C, Luo X, Deng S, et al. High-voltage trench-gate hole-gas enhancement-mode HEMT with multi-conduction channels. Sci China Inf Sci, 2018, 61: 062402
5. Zhou Q, Han Y, Zhang S F, et al. A low power V-band LC VCO with high Q varactor technique in 40 nm CMOS process. Sci China Inf Sci, 2017, 60: 089401
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