High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/3-540-44614-1_57
Reference9 articles.
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3. Min Xu and F. J. Kurdahi. Accurate prediction of quality metrics for logic level designs targeted toward lookup-table-based FPGA’s. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 7(4):411–418, December 1999.
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