1. Collier, W. W.Reasoning About Parallel Architectures. Prentice-Hall, Englewood Cliffs, NJ, 1992.
2. Dill, D. L., Park, S., and Nowatzyk, A. Formal specification of abstract memory models. In Research on Integrated Systems (1993), G. Borriello and C. Ebeling, Eds., MIT Press, pp. 38–52.
3. Ghughal, R. Test model-checking approach to verification of formal memory models, 1999.Also available from
http://www.cs.utah.edu/formal_verification
.
4. Ghughal, R., Nalumasu, R., Mokkedem, A., and Gopalakrishnan, G. Using “test model-checking” to verify the Runway-PA8000 memory model. In Tenth Annual ACM Symposium on Parallel Algorithms and Architectures (Puerto Vallarta, Mexico, June 1998).
5. Hojati, R., and Brayton, R. Automatic datapath abstraction of hardware systems. In Conference on Computer-Aided Verification (1995).