Automatic datapath abstraction in hardware systems-Reference-Cited by-同舟云学术

Automatic datapath abstraction in hardware systems

Published:1995 Issue: Volume: Page:98-113
ISSN:0302-9743
Container-title:Computer Aided Verification
language:
Short-container-title:

Author:

Hojati Ramin,Brayton Robert K.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-60045-0_43.pdf

Reference12 articles.

1. R. E. Bryant, “Graph Based Algorithms for Boolean Function Manipulation”, IEEE Trans. on Computers, C-35(8):677–691, August 1986.

2. J. Burch, D. Dill, “Automated Verification of Pipelined Micro-processors”, Computer-Aided Verification, 1994.

3. D. Cyrluk, P. Narendran, “Ground Temporal Logic: A Logic for Hardware Verification”, Computer-Aided Verification, 1994.

4. R. Hojati, R. K. Brayton, “An Environment for Formal Verification Based On Symbolic Computations”, Journal of Formal Methods, 1995.

5. R. Hojati, S. Krishnan, R. K. Brayton, “Heuristic Algorithms for Early Quantification and Partial Product Minimization”, ERL Memorandum M94/11, March 1994, UC Berkeley.

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