1. Arnold, J.M., et al.: The splash 2 processor and applications. In: International Conference on Computer Design. CS Press, München (1993)
2. Athanas, P.M., Silverman, H.F.: Processor reconfiguration through instruction-set metamorphosis. Computer 26(3), 11–18 (1993). doi: 10.1109/2.204677
3. Babb, J., Frank, M., Lee, V., Waingold, E., Barua, R., Taylor, M., Kim, J., Devabhaktuni, S., Agarwal, A.: The raw benchmark suite: computation structures for general purpose computing. In: FCCM ’97: Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines, p. 134. IEEE Computer Society, Los Alamitos (1997)
4. Barat, F., Lauwereins, R.: Reconfigurable instruction set processors: A survey. In: RSP ’00: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), p. 168. IEEE Computer Society, Los Alamitos (2000)
5. Barua, R., Lee, W., Amarasinghe, S., Agarwal, A.: Maps: A compiler-managed memory system for raw machines. In: Proceedings of the 26th International Symposium on Computer Architecture, pp. 4–15 (1998)